3D-stacking architecture for low-noise high-speed image sensors
نویسنده
چکیده
In this paper, architectures for low-noise high-speed image sensors based on 3D stacking technology are discussed. Effectiveness of the 3D-stacking technology for low-noise high-speed image sensors is demonstrated in an implementation of a 33Mpixel 240fps 3D-stacked CMOS image sensor based on 12b 3-stage cyclic-based pipelined ADCs. For extremely low noise and wide dynamic range imaging, highly-parallel multiplesampling based ADC will be an important technique for 3-D stacked CMOS image sensors.
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تاریخ انتشار 2016